Target Code Generation
What Is Target Code Generation?
This is the phase where the compiler translates intermediate code into machine code that can be executed on a specific processor (like x86, ARM, RISC-V).
It’s the final transformation before the program becomes runnable.
What Happens in This Phase?
The compiler:
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Maps operations to actual instructions supported by the CPU
Example:
t1 = a + b
→ADD R1, R2, R3
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Assigns variables to registers or memory
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Generates instructions for arithmetic, memory access, jumps, etc.
The result may be Assembly code (human-readable) or Binary/executable code (for the machine)
Example: Three-Address Code to Assembly
IR:
t1 = a + b
t2 = t1 * c
Target Code (x86-like):
MOV R1, a
ADD R1, b
MOV R2, c
MUL R2, R1